The Verification Engineer will verify RISC-V processors, develop verification solutions, collaborate with teams, define strategies, and track metrics.

The Formal Verification Engineer is responsible for applying formal verification techniques to improve the quality of RISC-V processors, contributing to tool development, and enabling the use of advanced methodologies in verification processes.

The Senior Hardware Engineer is responsible for the design and implementation of RISC-V processors, collaborating with teams on microarchitecture and verification, and ensuring design quality.

Lead Chiplet development by architecting, designing, and verifying high-performance silicon chiplets, coordinate with outsource partners, and ensure best practices in design processes.